Transmeta obviously wanted to make the Efficeon processor
as attractive as possible to potential partners in the portable
computing industry, especially since the CPU is more or less directly competing
with Intel's Centrino processor and chipset for success.
This would be the major reason for integrating the
traditional northbridge functions into the chip itself. By increasing the
complexity of the chip, Transmeta reduces the necessary complexity and
expense of the chipset that compliments it. This should continue to make the
Efficeon an attractive choice for low-power laptop manufacturers.
On the same note, the TM8620 (130nm
process) and TM8820 (90nm) Efficeon processors are considerably smaller than the
first Efficeon chips to hit market, at a planned 441mm square. The first
generation Efficeon 8600 package takes up 841mm. By reducing the motherboard real estate that
the chip takes up, further gains can be realized.
some suggestion that the 90nm (or smaller) versions of the Efficeon might find
a home in the PDA market if partnered by a suitable motherboard design... but
of course hard disk technology would have to catch up also. The
idea of running a full Windows XP tablet edition on a Pocket PC sized device is tantalizing. OQO Technology have
recently released a full WinXP PC with LCD display and 802.11b and Bluetooth, that measures
no larger than a pack of playing cards. The device, called the
OQO Model 1 is powered by the older 1GHz Crusoe TM5800-series Transmeta processor, but Efficeon-based versions may
to ensure the OQO is the first in a series of palm sized PCs powered by
Transmeta processors like the Efficeon, Transmeta have partnered with Nvidia in the development of
their Nforce 3 Go 120 chipset which is intended for ultra-portable devices.
More on this in a moment.
Efficeon and Hypertransport
One of the more exciting features of the Efficeon processor
is the inclusion of the Hypertransport bus, only before seen in AMD's Opteron
and Athlon 64 processors.
Hypertransport (HT) is a high-speed data carrying method
designed to replace or supplement many of the traditional input/output methods that can
cause bottlenecks on modern motherboards. HT provides for serial point-to-point links
between components at a variety of speeds and data widths, depending on the
amount of bandwidth required.
HT has a couple
of advantages over current bus technologies; firstly, HT links can provide considerable bandwidth and can be
used on compatible chipsets to carry data between
the CPU and the main memory as well as
to connect the CPU to the Northbridge and Southbridge. Since HT links are
point-to-point only, they provide a sort of highway for the data
coming off the slower buses, by means of Hypertransport Bridges built into the
Northbridge and Southbridge chips.
use packets to carry data, similar to modern Ethernet technology, where the address
of the data and the data itself is all transmitted on
a single wire, rather than having separate address and data lines as conventional
computer data buses do.
HT links can carry 3 times as much data
on far fewer data lines than are required for
conventional buses, simplifying motherboard design for manufacturers. The idea then, is that point-to-point
Hypertransport links are built between the CPU and the chipset, allowing it
to stream traffic from the various other buses onto this high bandwidth link
and reduce I/O bottlenecks.
The Efficeon's hypertransport link runs at 400mhz with
8-bit links in each direction. This gives a total available bandwidth of 1.6GB/s.