Motherboard makers have also reportedly been informed that Intel will focus more on its Z- and H-series chipsets.

The share of P67-series motherboards will begin dropping once the Z68 is launched and the segment will gradually be phased out, with the P-series not being included in Intel's next generation chipsets.

"Technically, Thunderbolt is pretty interesting as both data and display signals will transfer over the same cable with arbitration from the controller chip. It is a bi-directional communication that actually provides 10 Gbps of bandwidth PER PORT. It remains backwards compatible with existing DisplayPort displays, but since those devices likely do NOT have female mini-DisplayPort connections on them, they will not facilitate the daisy-chaining required for connecting multiple devices to a single Thunderbolt connection. Unlike what some people worried, Thunderbolt will carry some amount of power over cable, though how much hasn't really been specified yet. Thunderbolt can work on both data streams at the same time and in both directions and it seems to get the full 10 Gbps of rated bandwidth, in each direction. This is what gives the technology the advantage over the USB 3.0 of today. "

* DirectX 11-capable graphics * Massive parallel processing to speed application performance * The UVD3 video acceleration block found in the new AMD Radeon™ HD 6800 Series GPUs

Gigabyte preceded AMD's announcement yesterday in unveiling the E-350 APU (Zacate) powered GA-E350N-USB3 mini-ITX all-in-one motherboard. This is obviously aimed at the base of the pyramid, unlike the Intel i5-2500K we posted our examination of 36 hours ago, but the new AMD APUs look like they have the potential to transform the sector.

So what's the problem? The leakage current turned out to be higher than planned for one of the transistors. This happened because the dielectric layer turned out to be too thin for the chosen voltage, or the voltage was too high for that chip design. It's not clear how the error was made. Anyway, such things happen much more often than we hear about them. But in this case Intel is unlucky, because the problematic transistor is in the clock generator circuit responsible for SATA-300 ports (of which there are 4). In certain conditions this may result in controller synchronization errors, which, in turn, will lead to read and write errors. This may reduce performance of drives at best, as data will be read/written several times until confirmation. Under the least favorable conditions, data may be corrupted. This is not a certainty, but a possibility.

This is not a logical error in die topology (like a corrupt interconnection or something), but a potential problem that may show over time as a result of wear. Serious errors are detected as soon as the first wafer is made, because chips are run through a number of logic tests. How does one find a less serious error? All manufacturers use more or less similar accelerated aging methods. The same batch of chips is exposed to high temperatures in a heat chamber as well as high voltages to simulate prolonged wear. There are rather strict mathematical models which allow engineers to predict mean time between failure (MTBF) based on statistical damage results obtained in aforementioned wear tests. That's exactly what we're dealing with today: a prediction from Intel (we'll discuss exact changes and time periods later). One has to understand that it's a statistical estimate, not a fact. There are simply no 3-year old machines based on the new chipsets at the moment to speak of actual defects.

Since data stored on computers often costs much more than computers themselves (unless it's a gaming rig), Intel made a tough decision not to wait for actual trouble. As the Murphy's law states, "Anything that can go wrong, will go wrong," so they had to look for a solution."