In 2006 Intel introduced its tick-tock schedule for microprocessor development. The
"tick" part of the development cycle refers to a shrink in fabrication process, taking an
existing processor architecture and making it smaller, so it consumes less heat,
draws less power, and can be clocked to higher speeds. The 'tock" that follows
after uses that same miniaturized fabrication process and introduces a new
architecture, which can have larger cache sizes, new instruction sets, and more
This current strategy has not only been responsible for Intel's recent
advances in processors, like the Core i7 processor (codename: "Bloomfield"),
it's also helped Intel get its new processors out the door in a much more timely
fashion. It was a dramatic change from Intel's previous strategy of simply
pumping up the clockspeed of existing processors, yielding diminishing
performance increases while drawing exponentially more power and generating more
heat. Intel's new tick-tock strategy focuses on power efficiency.
In order to make this fabrication shrink happen on schedule Intel has
invested seven billion US dollars to re-tool its fabrication plants in Oregon,
Arizona and New Mexico for creation of 32nm processors.
The "Westmere" Processor Architecture
Westmere comes in on the "tick" part of Intel's development cycle,
meaning it's a shrink of fabrication process for an existing architecture. In
this case Westmere will be taking Intel's Nehalem architecture and shrinking it
from a 45nm to a 32nm process. This will also allow Intel to push clock speeds
further, in much the same way taking the Core 2 Duo architecture (codename:
"Conroe") and shrinking it to 45nm (codename: Penryn) yielded faster processor
Of course, that's not all there is to Westmere –
Intel has also introduced seven new instructions for the smaller processors that
focus primarily on improving their encryption capabilities. Westmere-based
chips should be fast enough to allow full-disk encryption, an important step in
establishing secure computing.
Intel's also going to start packaging an integrated graphics processor
core into certain Westmere processors. These integrated graphics cores
will be produced on a 45nm process while the rest of the processor is
manufactured at 32nm. Having an integrated graphics unit built in to the
processor means that the IGP can share some of the cache that power the general
purpose cores of the CPU. It will also remove some of the workload that was
typically done by the motherboard's northbridge controller.
Moving the IGP directly onto the CPU should reduce
some of the latency that slows down current integrated graphics chipsets.
However overall latency decreases likely won't be dramatic enough to make
Westmere integrated graphics cores competitive with discrete graphics
cards, especially given that Intel has said they're going to re-use one of their
older integrated graphics processor cores for use in Westmere.
Introducing the 32nm Processor
To understand the Westmere lineup, we must look back to the
first part of the Nehalem launch, the Intel Core i7 processor (codename:
"Bloomfield"), which is aimed at the high-end and extreme desktop user. The "Bloomfield" Core
i7 processor is built on a 45nm process, has four to eight cores, and
is built for the Intel X58 Express chipset
and socket LGA1366. The 32nm Westmere-based successor to Core
i7 will be codenamed "Gulftown".
This new 32nm processor will have six cores, a 12MB L3 Cache, and share the
same X58 chipset and 1366-pin socket. Being an enthusiast-class,
high-performance part, Gulftown processors won't have an integrated graphics
core, instead requiring a dedicated graphics card to power their display output.
The next part
of the Nehalem family is the Core i5 processor (codename: "Lynnfield"). These processors can
be thought of as the little brother of
the Core i7, and will generally be made more affordable for the
mainstream computer market. Unlike the Core i7's triple-channel memory, the Core i5 will
use dual-channel DDR3 memory, and use socket LGA1156.
The initial Core i5 "Lynnfield" processor will be a quad-core part, built on
a 45nm process.