Now that we've looked at the features that DDR2 has
to offer, let's explore the new abilities of DDR2 in more detail.
The DDR2 standard contains several major internal
changes to the way data is handled, allowing it to reach higher data transfer
speeds and save power. Foremost among these is DDR2's ability
to prefetch 4 bits of memory at a time, as compared to DDR's 2 bits.
Essentially this means that each clock cycle, 4 bits of data are presented to
the Input/output buffers for sequential transfer onto the memory bus (which
transfers data twice each clock cycle) while normal DDR memory transfers 2 bits
at a time. So DDR2 doubles the output of normal DDR. Yet if you look
at the specifications for DDR2-400 and DDR-400, they have the same peak
bandwidth, 3.2GB/s... shouldn't DDR2 have twice the bandwidth since it transfers
twice as much data?
answer is 'no,' and here's why: Ideally you want all the
data stored in the I/O buffers to be transferred each clock cycle. In a
conventional DDR-400 module, the memory core and I/O buffers both run at 200Mhz,
while externally the module can transfer data at 400Mhz thanks to DDR. So
the core can send 2 bits of data per clock cycle to each of the buffers, which
can only transfer one bit at a time to the external bus, but since the external
bus is effectively twice as fast as the buffers, it all evens out.
If you take this scenario and say that the core can
now transfer 4 bits of data per clock to each of the buffers, you will have a
problem. The external bus can only take 2 bits of data per clock cycle out
of each I/O buffer, so there is no real point to fetching an extra 2 bits
internally since the external speed and data capacity stays the same.
DDR2 gets around this problem by reducing the speed
of the core memory. In the same scenario as above, a DDR2-400 memory
module has a core speed of 100MHz, while the I/O buffers function at 200Mhz and
the external data rate is still 400Mhz DDR.
Now everything works again. In the time it
takes the core memory to deliver 4 bits of data to the buffers, the previous 4
bits have been transferred over the memory bus, which is now running four times
as fast as the core memory.
slows down the memory in order to achieve higher speeds - seems kind of
backwards doesn't it?
slower the core memory chips run, the easier and
cheaper it is to manufacture them to tolerance. So instead of taking the
traditional DDR method and increasing the speed of the core memory, resulting in
a product that is difficult to manufacture reliably, and in high volume, we can now
effectively set the clock back on core memory speeds, since more data is being
Consequently, DDR2-400 has an internal speed
of 100Mhz, DDR2-533 is at 133Mhz and DDR2-667 will use 166Mhz, and so
on.This also begins to explain how DDR2 can run faster
yet use considerably less power, 1.8v to DDR's 2.5.